Field of the Invention
The invention generally relates to high-density interconnections between electronic devices and components.
The invention relates more specifically to what is referred to as “permanent” interconnections, which include solderable interconnections, and/or mounting of electronic components on boards or on substrates, or on other electronic components and the like.
It provides interconnection elements, called leads or legs or contacts, to such components and it covers the shapes and orientation of these leads, to enhance the performance of such components, especially when these components are part of electronic systems that are exposed to harsh environment, such as temperature cycling and fluctuation.
The present invention covers in particular interconnections between “lead-less” electronic components and boards and/or substrates, or between similar lead-less components.
The specification utilizes many of the definitions and items described in the referenced patent applications.
General Background and Prior Art:
In the case of leadless electronic components, like the BGAs and the LCCCs, it has been known that soldering such components directly to substrates or to PCBs is not the right thing to do. It can lead to premature failure of the interconnecting joints. This is especially true, when the component is relatively large, i.e. approx. ¼ inch or larger on the side, and when the material of the component is different than that of the substrate, e.g. when the component is silicon or ceramic, while the substrate is FR4, and when the temperature can vary considerably during the operating life of the assembly.
The problem results mostly from exposing electronic assemblies to varying temperatures, such as thermal cycling or power cycling, or simply from being exposed to harsh environment, including hot and cold temperature environment. This is especially true, when the component is relatively large, when the material of the component is different than that of the substrate, and with different TCEs, i.e. with TCE Mismatch, and when the temperature fluctuates considerably and frequently during the life of the assembly.
For this reason, several designs have been proposed in the past to counteract the unfavorable effect of such conditions. For example, the inventor, Gabe Cherian, together with other co-inventors, had invented, back around 1982, what was called “CCMD”, Chip Carrier Mounting Device, which was later called “Solder Quick” or “Solder Columns” or “Cherian Columns”. This is covered by U.S. Pat. Nos. 4,664,309, 4,705,205 and 4,712,721. Other attempts have been made by other inventors, which were more or less successful. And finally, the inventor came up with the No-Wick™ concept mentioned in the Refs.
The additional problem nowadays is the fact that many of the components are being miniaturized. The center distances between contact pads are getting smaller and smaller, and the old inventions can no longer keep up with such miniaturization. For example, BGAs have center distances down to 0.020″ (approx. 0.5 mm) and when we consider Chip Scale Packaging, the center distances can be even smaller. The Cherian Solder Columns were originally designed and built to work with 0.050″ (approx. 1.25 mm) center distances. Cherian Solder Columns cannot readily be simply scaled down to size. For this reason, I created two new inventions. The first is the No-Wick™ concept mentioned in the Refs. The second is the TFCC and the SWCC inventions described in the present patent application as will be described here below.
Prior Art
There is a lot of prior art in this field. Several designs have been proposed in the past to counteract the unfavorable effect of the above mentioned conditions.
In my “mother” patent applications, which are referenced above, I have listed a few important prior art documents. Please refer to them.